您好，歡迎進入深圳市穎特新科技有限公司官方網站！
您好，歡迎進入深圳市穎特新科技有限公司官方網站！
關于捕獲
定時器2是一個16位的向上計數(shù)器，由高8位寄存器(TH2)和低8位寄存器(TL2)組成。通過配置寄存器RCMP2H和RCMP2L，設置 
(T2CON.0)后，定時器2能工作在比較模式和自動重載模式下。
定時器2具有3通道輸入捕獲模塊，可用于測量輸入脈沖寬度或周期。3通道捕獲結果分別存放在寄存器C0H 及 C0L, C1H 及 C1L, C2H及 C2L中。定時器2的時鐘來自系統(tǒng)時鐘的分頻，總共具有8級分頻，可適用于更多應用需求。當TR2(T2CON.2) 置 1，定時器使能；TR2置0時，定時器關閉。下列寄存器用于控制定時器2功能。
自動重裝載功能模式
當 
清0，定時器2配置為自動重裝載模式。在該模式下，RCMP2H 及 RCMP2L保存重裝載的數(shù)值。當LDEN置位后，一旦有觸發(fā)事件發(fā)生，硬件將自動把 RCMP2H 及 RCMP2L 寄存器內的值寫入TH2 及 TL2 中。觸發(fā)事件可以是定時器2溢出或是一個所配置的捕獲信道有觸發(fā)事件發(fā)生（根據(jù)LDTS[1:0] (T2MOD[1:0])配置）。注意，一旦CAPCR (T2MOD.3) 置1，如有一個捕獲事件發(fā)生，僅清除TH2及 TL2 內的值，不會將 RCMP2H 及 RCMP2L的值載入。
比較功能模式
當 
置1，定時器2配置為比較器模式。在該模式下，RCMP2H 及 RCMP2L 預存待比較數(shù)據(jù)。由于定時器2向上計數(shù)，一旦TH2 和 TL2 匹配RCMP2H 和 RCMP2L的設定值，TF2 (T2CON.7) 將會由硬件置1，用以標示發(fā)生了比較匹配事件。
如果 CMPCR (T2MOD.2) 置1，當發(fā)生比較匹配事件后，定時器2 計數(shù)器將硬件自動清0。
輸入捕獲功能模塊
輸入捕獲模塊依靠定時器2實現(xiàn)輸入捕獲功能。輸入捕獲模塊通過寄存器CAPCON0~2配置來支持3組信道輸入(CAP0，CAP1和CAP2)，可選擇配置9個引腳（P1.5，P1[2：0]，P0.0，P0.1和P0[5：3]）。引腳復合功能選擇通過CAPCON3和CAPCON4配置。每個輸入通道的噪聲濾波器可通過設置ENF0~2 (CAPCON2[6:4])使能，可濾除小于4個系統(tǒng)時鐘的輸入毛刺。每組輸入捕獲通道共享定時器2計數(shù)，但有自己獨立的邊沿檢測。每個觸發(fā)邊沿檢測可由寄存器CAPCON1的相關位獨立配置，支持正邊沿捕獲，負邊沿捕獲，或雙邊沿捕獲。在使用前，必須設置通道使能位CAPEN0~2 (CAPCON0[6:4])。
當輸入捕獲通道使能且所選擇的邊沿觸發(fā)發(fā)生時，定時器2的計數(shù)值TH2和TL2將被捕獲、傳輸并存儲到捕獲寄存器CnH 和 CnL。邊沿觸發(fā)也可硬件置位CAPFn (CAPCON0.n)，如果ECAP (EIE.2)和EA都打開，將產生中斷。三組輸入捕獲共享一個中斷向量, 用戶可通過檢查CAPFn來確定具體哪個通道有輸入捕獲。這些標志必須由軟件清零。
CAPCR (CAPCON2.3)用于周期計算。當設置CAPCR為1，一個捕獲邊沿事件發(fā)生后，TH2和TL2的值將被保存，然后硬件將自動清除定時器2的值為0000H。這樣可以避免常規(guī)軟件寫16位計數(shù)或者算法開銷。
#include "N76E003.h" #include "Common.h" #include "Delay.h" #include "SFR_Macro.h" #include "Function_define.h" //***************** The Following is in define in Fucntion_define.h *************************** //****** Always include Function_define.h call the define you want, detail see main(void) ******* //*********************************************************************************************** #if 0 ////-------------------- Timer2 Capture define -------------------- ////--- Falling Edge ----- //#define IC0_P12_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC1_P11_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x01;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC2_P10_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x02;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC3_P00_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x03;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC3_P04_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x04;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC4_P01_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x05;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC5_P03_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x06;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC6_P05_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x07;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC7_P15_CAP0_FallingEdge_Capture CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x08;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC0_P12_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC1_P11_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x10;CAPCON0|=SET_BIT5;CAPCON0|=SET_BIT5 //#define IC2_P10_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x20;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC3_P00_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x30;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC3_P04_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x40;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC4_P01_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x50;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC5_P03_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x60;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC6_P05_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x70;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC7_P15_CAP1_FallingEdge_Capture CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x80;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC0_P12_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC1_P11_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x10;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC2_P10_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x20;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC3_P00_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x30;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC3_P04_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x40;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC4_P01_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x50;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC5_P03_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x60;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC6_P05_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x70;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 //#define IC7_P15_CAP2_FallingEdge_Capture CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x80;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6 ////----- Rising edge ---- //#define IC0_P12_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC1_P11_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x01;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC2_P10_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x02;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC3_P00_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x03;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC3_P04_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x04;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC4_P01_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x05;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC5_P03_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x06;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC6_P05_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x07;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC7_P15_CAP0_RisingEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x08;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4; //#define IC0_P12_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0FCAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC1_P11_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x10;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC2_P10_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x20;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC3_P00_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x30;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC3_P04_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x40;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC4_P01_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x50;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC5_P03_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x60;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC6_P05_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x70;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC7_P15_CAP1_RisingEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x80;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC0_P12_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC1_P11_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x01;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC2_P10_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x02;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC3_P00_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x03;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC3_P04_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x04;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC4_P01_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x05;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC5_P03_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x06;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC6_P05_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x07;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC7_P15_CAP3_RisingEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x08;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; ////-----BOTH edge ---- //#define IC0_P12_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC1_P11_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x01;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC2_P10_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x02;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC3_P00_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x03;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC3_P04_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x04;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC4_P01_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x05;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC5_P03_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x06;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC6_P05_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x07;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC7_P15_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x08;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 //#define IC0_P12_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5 //#define IC1_P11_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x10;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC2_P10_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x20;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC3_P00_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x30;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC3_P04_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x40;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC4_P01_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x50;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC5_P03_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x60;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC6_P05_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x70;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC7_P15_CAP1_BothEdge_Capture CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x80;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5; //#define IC0_P12_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC1_P11_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x01;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC2_P10_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x02;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC3_P00_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x03;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC3_P04_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x04;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC4_P01_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x05;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC5_P03_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x06;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC6_P05_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x07;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define IC7_P15_CAP3_BothEdge_Capture CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x08;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6; //#define TIMER2_IC2_DISABLE CAPCON0&=~SET_BIT6 //#define TIMER2_IC1_DISABLE CAPCON0&=~SET_BIT5 //#define TIMER2_IC0_DISABLE CAPCON0&=~SET_BIT4 ///*---------------------------------------------------------------------------------------------------------- //* Timer2 mode define //------------------------------------------------------------------------------------------------------------*/ //#define TIMER2_CAP0_Capture_Mode T2CON&=~SET_BIT0;T2MOD=0x89 //#define TIMER2_CAP1_Capture_Mode T2CON&=~SET_BIT0;T2MOD=0x8A //#define TIMER2_CAP2_Capture_Mode T2CON&=~SET_BIT0;T2MOD=0x8B ///*---------------------------------------------------------------------------------------------------------- //* Timer devider define //----------------------------------------------------------------------------------------------------------*/ //#define TIMER2_DIV_4 T2MOD|=0x10;T2MOD&=0x9F //#define TIMER2_DIV_16 T2MOD|=0x20;T2MOD&=0xAF //#define TIMER2_DIV_32 T2MOD|=0x30;T2MOD&=0xBF //#define TIMER2_DIV_64 T2MOD|=0x40;T2MOD&=0xCF //#define TIMER2_DIV_128 T2MOD|=0x50;T2MOD&=0xDF //#define TIMER2_DIV_256 T2MOD|=0x60;T2MOD&=0xEF //#define TIMER2_DIV_512 T2MOD|=0x70 #endif /************************************************************************************************************ * Timer2 Capture interrupt subroutine ************************************************************************************************************/ void Capture_ISR (void) interrupt 12 { clr_CAPF0; // clear capture0 interrupt flag P1 = C0L; // For capture mode CxL/CxH with data capture from I/O pin P2 = C0H; P12 = ~P12; //toggle GPIO1 to show int printf("\n TM2 CAP 0x%bX",C0H); clr_TF2; } /************************************************************************************************************ * Main function ************************************************************************************************************/ void main (void) { Set_All_GPIO_Quasi_Mode; InitialUART0_Timer3(115200); P00_Input_Mode; P00 = 1; TIMER2_CAP0_Capture_Mode; IC3_P00_CAP0_BothEdge_Capture; set_ECAP; //Enable Capture interrupt set_TR2; //Triger Timer2 set_EA; while(1); }
#define TIMER2_CAP0_Capture_Mode T2CON&=~SET_BIT0;T2MOD=0x89
#define TIMER2_CAP1_Capture_Mode T2CON&=~SET_BIT0;T2MOD=0x8A
#define TIMER2_CAP2_Capture_Mode T2CON&=~SET_BIT0;T2MOD=0x8B
#define IC0_P12_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC1_P11_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x01;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC2_P10_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x02;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC3_P00_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x03;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC3_P04_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x04;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC4_P01_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x05;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC5_P03_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x06;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC6_P05_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x07;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4 #define IC7_P15_CAP0_BothEdge_Capture CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x08;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
想用定時器2的捕獲功能，就是我捕獲的信號可能要超過定時器最高值65536。請教各位高手當超出了會不會引起定時器2中斷
捕獲也是一種定時器中斷，定時器計數(shù)到頭也是一種，兩種不同，因為可能樓主說的情況發(fā)生，當然會提供一個中斷，這樣你可以知道你計時長度啊，要不然不準了。
set_ECAP
#define set_ECAP EIE |= SET_BIT2
set_TR2
void Capture_ISR (void) interrupt 12 { clr_CAPF0; // clear capture0 interrupt flag P1 = C0L; // For capture mode CxL/CxH with data capture from I/O pin P2 = C0H; P12 = ~P12; //toggle GPIO1 to show int printf("\n TM2 CAP 0x%bX",C0H); clr_TF2; }
